制造商 | 部件名 | 数据表 | 功能描述 |
Integrated Device Techn...
|
ICS9P935 |
197Kb/13P |
DDR I/DDR II Phase Lock Loop Zero Delay Buffer |
9P935AFLF |
197Kb/13P |
DDR I/DDR II Phase Lock Loop Zero Delay Buffer |
ICS93718 |
102Kb/9P |
DDR and SDRAM Buffer |
ICSSSTVF16857 |
939Kb/8P |
DDR 14-BIT REGISTERED BUFFER |
ICSSSTVA16857 |
83Kb/9P |
DDR 14-Bit Registered Buffer |
ICS951702 |
160Kb/12P |
PIII??System Clock Chip for DDR SDRAM |
6V49205B |
275Kb/16P |
Freescale System Clock w/Selectable DDR Frequency |
ICSSSTVA16859C |
293Kb/10P |
DDR 13-Bit to 26-Bit Registered Buffer |
ICSSSTVF16859B |
114Kb/10P |
DDR 13-Bit to 26-Bit Registered Buffer |
IDT71P71804 |
228Kb/23P |
18Mb Pipelined DDR?줚I SRAM Burst of 2 |
IDT71P73204 |
635Kb/25P |
18Mb Pipelined DDR?줚I SRAM Burst of 4 |
IDT71P79204 |
629Kb/23P |
18Mb Pipelined DDR?줚I SIO SRAM Burst of 2 |
840NT4 |
611Kb/30P |
System & DDR Clocks for Freescale B4/T4 Processor Systems |
ICS9P936 |
194Kb/12P |
Low Skew Dual Bank DDR I/II Fan-out Buffer |
ADC1112D125 |
601Kb/39P |
Dual 11-bit ADC; CMOS or LVDS DDR digital outputs |
IDT72T4088 |
497Kb/52P |
2.5 VOLT HIGH-SPEED TeraSync DDR/SDR FIFO 40-BIT CONFIGURATION |
IDT72T2098 |
481Kb/51P |
2.5 VOLT HIGH-SPEED TeraSync??DDR/SDR FIFO 20-BIT/10-BIT CONFIGURATION |
ADC1115S125 |
373Kb/36P |
Single 11-bit ADC; 125 Msps with input buffer; CMOS or LVDS DDR digital outputs |
IDT72T54242 |
543Kb/56P |
2.5V QUAD/DUAL TeraSync??DDR/SDR FIFO x10 QUAD FIFO or x10/x20 DUAL FIFO CONFIGURATIONS |
ADC1010S |
386Kb/37P |
Single 10-bit ADC; 65 Msps, 80 Msps, 105 Msps or 125 Msps; CMOS or LVDS DDR digital outputs |